IBIS Macromodel Task Group Meeting date: 20 July 2010 Members (asterisk for those attending): Adge Hawes, IBM * Ambrish Varma, Cadence Design Systems Anders Ekholm, Ericsson * Arpad Muranyi, Mentor Graphics Corp. Barry Katz, SiSoft * Bob Ross, Teraspeed Consulting Group Brad Brim, Sigrity Brad Griffin, Cadence Design Systems Chris Herrick, Ansoft Chris McGrath, Synopsys * Danil Kirsanov, Ansoft David Banas, Xilinx Deepak Ramaswany, Ansoft Donald Telian, consultant Doug White, Cisco Systems * Eckhard Lenski, Nokia-Siemens Networks Eckhard Miersch, Sigrity Essaid Bensoudane, ST Microelectronics * Fangyi Rao, Agilent Ganesh Narayanaswamy, ST Micro Gang Kang, Sigrity Hemant Shah, Cadence Design Systems Ian Dodd, consultant Jerry Chuang, Xilinx Joe Abler, IBM * John Angulo, Mentor Graphics John Shields, Mentor Graphics Ken Willis, Sigrity Kellee Crisafulli, Celsionix * Kumar Keshavan, Sigrity Lance Wang, Cadence Design Systems Luis Boluna, Cisco Systems * Michael Mirmak, Intel Corp. * Mike LaBonte, Cisco Systems Mike Steinberger, SiSoft Mustansir Fanaswalla, Xilinx Patrick O'Halloran, Tiburon Design Automation Paul Fernando, NCSU Pavani Jella, TI Radek Biernacki, Agilent (EESof) * Randy Wolff, Micron Technology Ray Komow, Cadence Design Systems Richard Mellitz, Intel Richard Ward, Texas Instruments Samuel Mertens, Ansoft Sam Chitwood, Sigrity Sanjeev Gupta, Agilent Scott McMorrow, Teraspeed Consulting Group Shangli Wu, Cadence Design Systems Sid Singh, Extreme Networks Stephen Scearce, Cisco Systems Steve Kaufer, Mentor Graphics Steve Pytel, Ansoft Syed Huq, Cisco Systems Syed Sadeghi, ST Micro Ted Mido, Synopsys Terry Jernberg, Cadence Design Systems Todd Westerhoff, SiSoft Vladimir Dmitriev-Zdorov, Mentor Graphics Vikas Gupta, Xilinx Vuk Borich, Agilent * Walter Katz, SiSoft Wenyi Jin, LSI Logic Zhen Mu, Mentor Graphics ------------------------------------------------------------------------ Opens: - Arpad: Walter's BIRDs were not put on the agenda because we may not have time -------------------------- Call for patent disclosure: - No one declared a patent. ------------- Review of ARs: - Todd send update presentation to Mike for posting - Done - Walter send new BIRD draft to Mike for posting - Done - Arpad: Write parameter passing syntax proposal (BIRD draft) for *-AMS models in IBIS that is consistent with the parameter passing syntax of the AMI models - TBD: Propose a parameter passing syntax for the SPICE - [External ...] also? - TBD - Arpad: Review the documentation (annotation) in the macro libraries. - Deferred until a demand arises or we have nothing else to do ------------- New Discussion: Michael M summarized work on the IBIS-ISS document: - It is "difficult" to edit - Trying to find rule checking examples that will pass HSPICE - Revision 0.4 is available - Revision 0.5 has a change to string params - Additional reformatting will make it cleaner - Examples will be checked, and which version they work in - Conflict between already found regarding line continuation backslash - Could file a bug with Synopsys - Todd will check with them on our legal standing - Arpad: It would be best if they fixed the inconsistency - Michael M: We are making use of a defacto standard - They have made the rules more strict lately - We should find the most generous rule interpretation - Arpad: Should we ask Synopsys about the inconsistency? AR: Michael M. contact Synopsys about line continuation inconsistency Michael M showed a summary of paragraphs from HSPICE pages: - The dispute is about continuing a line without a space - It is usually used for expressions - Double backslash called for in some places, single in others Michael M showed an HSPICE netlist with different line continuation styles: - Backslash illegal in some places Michael M showed 2nd HSPICE netlist with different line continuation styles: - The examples don't match the documentation we received - Bob: We can state that there are inconsistencies - Michael M: The generous reading will cause people to have some trouble - The strict reading might have ISS disallowing forms that sometimes work - There is no right answer here - Walter: The purpose was to get W-lines etc. - It would be easier to stay away from this - Arpad: Flattening out some of these would leave them with no whitespace - Do we have a line length limit in ISS? - Walter: We have the plus sign continuation - Michael M: People like Verilog-A better than SPICE because of multi-line difficulties - Plus sign is not to be used to continue a single token - Walter: We should allow only single backslash Michael M: What kinds of functions should we allow for sources? - We do support dependent sources - This creates node names we can't use - CCCS CCVS DELAY OPAMP VCCS VCVS - Arpad: These may conflict because the subcircuits could be used in any tool that may have these rules - Mike L: We may incrementally find more and more of these reserved names - We discussed that translators may be needed for these circuits anyway - Maybe we should have no reserved names and let translators rename as needed - Walter: We should only specify what should be done, not what should not be - Kumar: It may be too tricky to rely on translators Arpad showed the updated flow diagram presentation: - Walter: The choice was between this flow and one already on the table - I had proposed an adjunct flow to this one - Some people think we should focus on this flow - Arpad: This one does not change Init_Returns_Filter - Walter: I have submitted a BIRD that proposes this flow - Ken commented case #7 requires deconvolution and should be dropped - Arpad: Would like to ask about preference between my flow and Walter's Walter showed AMI Flow 9 side by side with his new one: - Kumar: The new one has GetWave_Exists T/F - Walter: If it doesn't exist that means all info is in the Init - TX Init modifies the impulse response - Ambrish: The only difference is the digital input to TX GetWave? - Kumar: What does Use_Init_Output T/F mean here? - Arpad: We got rid of Use_Init_Output - Walter: If it's LTI we should be able to construct the GetWave response - Kumar: So we do not support split models - Walter: But we do support dual models - Danil: Deconvolution is not going to work - It is really hard to get it mathematically correct - Walter: On a test bench you can measure the waveform - A sampling scope can predict the eye at the decision point - We find deconvolution to not be a big deal, but better to avoid - Kumar: We should support dual models - Mike L: Wouldn't a boolean be needed to say that is being done? - Walter: We have enough information to choose between the two proposals - Arpad: Walter's flow will work without deconvolution if Init_Returns_Filter - Only old models would need deconvolution - My flow has fewer changes - Fangyi: Arpad's flow works in all cases but #7 - Walter's flow requires deconvolution, Arpad's does not not - Arpad: The TX and RX models could be from different vendors - But they have to work together - Bob: Arpad's flow assumes a different data structure - Arpad: Old models may not optimize - Walter: Arpad's flow will require tool changes - Arpad: They both require tool changes - Walter: 50 to 100 models are in customers' hands today - They all work with my flow - Ambrish: How many are case #7? - Walter: None - None have just RX Init_Returns_Filter and RX GetWave_Exists - Kumar: We should not modify the data structure - Complicated models will harm reliability - Prefer Walter's approach Arpad: Shall we vote? - Kumar: We need one more week - Arpad: Each flow has two changes, technically three - Walter: Every agrees BIRD 107 was a mistake because it still had analog input - Arpad: Kumar could still write a BIRD for his flow if it is important - We will vote next week to choose a flow - That vote should not be interrupted by a new flow - Walter: We will submit our BIRD even if Arpad's BIRD is submitted - Arpad: Maybe we should just both submit - Mike L: If our vote may result in two BIRDS anyway maybe they should both be submitted - Walter: Some people who are not in this group would prefer my flow - Arpad: next week we will begin by voting without discussion Next meeting: 27 July 2010 12:00pm PT -------- IBIS Interconnect SPICE Wish List: 1) Simulator directives